AT91SAM7S512-MU

Product Summary

The AT91SAM7S512-MU is a series of low pincount Flash microcontrollers based on the 32-bit ARM RISC processor. It features a high-speed Flash and an SRAM, a large set of peripherals, including a USB 2.0 device (except for the AT91SAM7S512-MU32 and AT91SAM7S512-MU16), and a complete set of system functions minimizing the number of external components. The device is an ideal migration path for 8-bit microcontroller users looking for additional performance and extended memory. The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via a parallel interface on a production programmer prior to mounting. Built-in lock bits and a security bit protect the firmware from accidental overwrite and preserves its confidentiality. The AT91SAM7S512-MU Series system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated RC oscillator. The AT91SAM7S512-MU Series are general purpose microcontrollers. Their integrated USB Device port makes them ideal devices for peripheral applications requiring connectivity to a PC or cellular phone. Their aggressive price point and high level of integration pushes their scope of use far into the cost-sensitive, high-volume consumer market.

Parametrics

AT91SAM7S512-MU absolute maximum ratings: (1)Operating Temperature: -40℃ to 83 ℃; (2)Storage Temperature: -60℃ to 150℃; (3)voltage on Input Pins with respect to ground: -0.3V to 5.5V; (4)maximum operating voltage: 2.0V; (5)Maximum Operating voltage: 4.0V; (6)Total DC output current on all I/O lines: 48-lead LQFP/QFN package: 100mA; 64-lead LQFP/QFN package: 150mA.

Features

AT91SAM7S512-MU features: (1)High-performance 32-bit RISC Architecture; (2)High-density 16-bit Instruction Set; (3)Leader in MIPS/Watt; (4)EmbeddedICE. In-circuit Emulation, Debug Communication Channel Support; (5)512 Kbytes Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes (Dual Plane); (6)Single Cycle Access at Up to 30 MHz in Worst Case Conditions; (7)Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed; (8)Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms; (9)10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit; (10)Fast Flash Programming Interface for High Volume Production; (11)64 Kbytes Internal High-speed SRAM, Single-cycle Access at Maximum Speed; (12)Embedded Flash Controller, Abort Status and Misalignment Detection; (13)Based on Power-on Reset and Low-power Factory-calibrated Brown-out Detector; (14)Provides External Reset Signal Shaping and Reset Source Status; (15)Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL; (16)20-bit Programmable Counter plus 12-bit Interval Counter; (17)12-bit key-protected Programmable Counter; (18)32-bit Free-running Counter with Alarm; (19)On-chip Transceiver, 328-byte Configurable Integrated FIFOs; (20)One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os; (21)Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components; (22)3.3V or 1.8V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply; (23)1.8V VDDCORE Core Power Supply with Brown-out Detector; (24)Fully Static Operation: Up to 55 MHz at 1.65V and 85. C Worst Case Conditions; (25)Available in 64-lead LQFP Green or 64-pad QFN Green Package.

Diagrams