Product Summary
The MPC755CPX400LE is a MCU. The MPC755CPX400LE is targeted for low-cost, low-power systems and supports the following power management features—doze, nap, sleep, and dynamic power management. The MPC755CPX400LE consists of a processor core and an internal L2 tag combined with a dedicated L2 cache interface and a 60x bus.
Parametrics
MPC755CPX400LE absolute maximum ratings: (1)Core supply voltage, VDD: –0.3 to 2.5V; (2)PLL supply voltage, AVDD: –0.3 to 2.5V; (3)L2 DLL supply voltage, L2AVDD: –0.3 to 2.5V; (4)Processor bus supply voltage, OVDD: –0.3 to 3.6V; (5)L2 bus supply voltage, L2OVDD: –0.3 to 3.6V.
Features
MPC755CPX400LE features: (1)Four instructions fetched per clock; (2)One branch processed per cycle (plus resolving two speculations); (3)Up to one speculative stream in execution, one additional speculative stream in fetch; (4)512-entry branch history table (BHT) for dynamic prediction; (5)64-entry, four-way set-associative branch target instruction cache (BTIC) for eliminating; (6)branch delay slots.
Diagrams
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![]() MPC755CPX400LE |
![]() Freescale Semiconductor |
![]() Microprocessors (MPU) GF RV2.8360PBGA 4A105C |
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![]() MPC755CPX400LER2 |
![]() Freescale Semiconductor |
![]() Microprocessors (MPU) GF RV2.8360PBGA 4A105C |
![]() Data Sheet |
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