Product Summary
The XC95144XL-10TQ100C is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of eight 54V18 Function Blocks, providing 3,200 usable gates with propagation delays of 5 ns.
Parametrics
XC95144XL-10TQ100C absolute maximum ratings: (1)VCC, Supply voltage relative to GND: –0.5 to 4.0 V; (2)VIN, Input voltage relative to GND: –0.5 to 5.5 V; (3)VTS, Voltage applied to 3-state output: –0.5 to 5.5 V; (4)TSTG, Storage temperature (ambient): –65 to +150℃; (5)TSOL, Maximum soldering temperature (10s @ 1/16 in. = 1.5 mm): +220℃; (6)TJ, Junction temperature +150℃.
Features
XC95144XL-10TQ100C features: (1)5 ns pin-to-pin logic delays; (2)System frequency up to 178 MHz; (3)144 macrocells with 3,200 usable gates; (4)Optimized for high-performance 3.3V systems; (5)Low power operation; (6)5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals; (7)3.3V or 2.5V output capability; (8)Advanced 0.35 micron feature size CMOS Fast FLASH technology; (9)In-system programmable; (10)Superior pin-locking and routability with Fast CONNECT II switch matrix; (11)Extra wide 54-input Function Blocks; (12)Up to 90 product-terms per macrocell with individual product-term allocation; (13)Local clock inversion with three global and one product-term clocks; (14)Individual output enable per output pin with local inversion; (15)Input hysteresis on all user and boundary-scan pin inputs; (16)Bus-hold circuitry on all user pin inputs; (17)Full IEEE Standard 1149.1 boundary-scan (JTAG); (18)Fast concurrent programming; (19)Slew rate control on individual outputs; (20)Enhanced data security features; (21)Excellent quality and reliability; (22)Endurance exceeding 10,000 program/erase cycles; (23)20 year data retention; (24)ESD protection exceeding 2,000V; (25)Pin-compatible with 5V-core XC95144 device in the 100-pin TQFP package.
Diagrams
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